SDMMC_ADMA_ERR_STAT_R

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Interpret as SDMMC_ADMA_ERR_STAT_R

ADMA_ERR_STATES=Val_0x0, ADMA_LEN_ERR=Val_0x0

ADMA Error Status Register

ADMA_ERR_STATES

ADMA Error States. These bits indicate the state of ADMA when an error occurs during ADMA data transfer.

0 (Val_0x0): Stop DMA (SYS_ADR register points to a location next to the error descriptor)

1 (Val_0x1): Fetch Descriptor (SYS_ADR register points to the error descriptor)

2 (Val_0x2): Never set this state

3 (Val_0x3): Transfer Data (SYS_ADR register points to a location next to the error descriptor)

ADMA_LEN_ERR

ADMA Length Mismatch Error States. This error occurs in the following events:

While the SDMMC_XFER_MODE_R[BLOCK_COUNT_ENABLE] bit is being set, the total data length specified by the Descriptor table is different from that specified by the Block Count and Block Length.
When the total data length cannot be divided by the block length.

0 (Val_0x0): No error

1 (Val_0x1): Error

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